About us


Crescent Bay Software specializes in compiler technology for high-performance architectures. We are experts in vectorization, automatic parallelization, and high-level optimization of computer programs. Our best known product line is the VAST family of automatic optimizers, currently used with, for example, ARM-based processors with the NEON vector SIMD unit and NEC supercomputers, as well as forthcoming new architectures.
Experience The staff of Crescent Bay Software has a combined record of more than a century in compiler optimization, with advanced degrees in mathematics, physics, computer science and business administration.
Location Since the beginning, we've lived and worked near Santa Monica Bay, in the Los Angeles area -- thus our name and logo.
History Although VAST is a state-of-the-art product under continuing development, it has a long history. Since its inception in 1979, when we worked at Pacific-Sierra Research, it has been an important part of the compilation systems for many of the leading high-performance architectures: array processors such as Univac's APS (for which we also wrote the microcoded vector library), mini-supercomputers such as the Alliant (first commercial autoparallelization) and Convex, VLIW architectures such as the Cydrome and the Intel i860, high-end workstations like the IBM RS/6000, mainframes with vector capability (IBM 360), and big-iron supercomputers (Cray Research parallel-vector systems, Cray Computer, CDC spinoff ETA, Fujitsu and NEC). In recent years much of our work has been in the embedded space and related areas - PowerPC/Altivec, Telairity TVP, and ARM NEON and SVE, among others.

Somewhere along the way (OK, it was in 2003) we managed to become our own company, exclusively dedicated to what we had been doing all along, advanced compiler optimization.

Back at the dawn of time, pre-VAST, several of us also worked on hand-conversion of programs to early parallel and vector systems such as the ILLIAC IV (the first massively parallel computer), the CDC-7600 (the first RISC machine, with latent vector capability via the multiple segmented functional units), and the Cray-1, the first vector supercomputer (which initially came without a compiler!).

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